(a) Field of the Invention
The present invention relates to a differential amplifier. More specifically, the present invention relates to a transconductance control circuit of rail-to-rail differential input stages of an operational amplifier.
(b) Description of the Related Art
The input stage of a low-voltage amplifier processes a rail-to-rail (RTR) common mode input voltage to overcome a restricted swing range. An NMOS differential pair and a PMOS differential pair are coupled in parallel to obtain an RTR common mode input voltage swing. The operating range can be extended to a higher voltage level by using the NMOS differential pair and the operating range can be extended to a lower voltage level by using the PMOS differential pair. A differential pair, which has an input range extending from a negative supply rail to a positive supply rail is referred to as an RTR transconductor.
A common mode input range of an RTR differential input stage consists of three parts. The first one is a low common-mode input voltage part for operating the PMOS differential pair, the second one is an intermediate common-mode input voltage part for operating the PMOS and NMOS differential pairs, and the third one is a high common-mode input voltage part for operating the NMOS differential pair. When a common-mode input voltage moves from one part to another, the corresponding transconductance (referred to as Gm hereinafter) changes by about 100%.
FIG. 1 shows a configuration of a conventional RTR differential input stage, which includes a PMOS and an NMOS differential pair. The NMOS differential pair comprises NMOS transistor M1 10 and NMOS transistor M2 20 to extend the operating range to a maximum voltage level. The PMOS differential pair comprises PMOS transistor M3 30 and PMOS transistor M4 40 to extend the operating range to a minimum voltage level. Current source IP 50 and current source IN 60 power the differential input stage.
The operating voltages of current source IP 50 and current source IN 60 are respectively denoted as Vp and Vn, the gate-source voltages of the NMOS transistors 10 and 20 and the PMOS transistors 30 and 40 are respectively denoted as VGS,n and VGS,p. Finally, the Vcm common-mode voltage is defined as [(V+)+(V−)]/2. The operating range of the differential pair of the RTR differential input stage is as follows. First, in the case of a low common-mode input voltage (Vcm), that is, when Vcm>VA=Vn+VGS,n, the NMOS differential pair is operated. Second, when VA<Vcm<VB, both the NMOS and PMOS differential pairs are operated. The transconductance Gm in this second operating case is:
                                                        Gm              =                                                ∂                                      [                                                                  (                                                  I1                          -                          I2                                                )                                            +                                              (                                                  I3                          -                          I4                                                )                                                              ]                                                                    ∂                  Vin                                                                                                        =                                                                    ∂                                          (                                              I1                        -                        I2                                            )                                                                            ∂                    Vin                                                  +                                                      ∂                                          (                                              I3                        -                        I4                                            )                                                                            ∂                    Vin                                                                                                                          =                                                Gm                  ⁢                                      ,                                    ⁢                  n                                +                                  Gm                  ⁢                                      ,                                    ⁢                  p                                                                                        (        1        )            
Third, in the case of a high common-mode input voltage of Vcm<VB=Vp+VGS,p, the PMOS differential pair is operated. In Equation (1) Vin is a differential input voltage, defined as [(V+)−V(−)]/2. Gm,n and Gm,p are given by Equations 2 and 3 derived according to a MOS transistor quadratic equation:
                              Gm          ⁢                      ,                    ⁢          n                =                                            2              ⁢                                                          ⁢                              μ                n                            ⁢                                                Cox                  ⁡                                      (                                          W                      L                                        )                                                  n                            ⁢              IN                                =                      kn            ⁢                          IN                                                          (        2        )            
                              Gm          ⁢                      ,                    ⁢          p                =                                            2              ⁢                              μ                p                            ⁢                                                Cox                  ⁡                                      (                                          W                      L                                        )                                                  p                            ⁢              IP                                =                      Kn            ⁢                          IP                                                          (        3        )                            where μn and μp are the mobility of electrons and holes respectively, (W/L)n and (W/L)p are aspect ratios of a channel length L and channel width W of the NMOS and PMOS transistors respectively, and Cox is the oxide capacitance. The total transconductance is found from Equations 1–3 (for VA<Vcm<VB) as:Gm=Kn√{square root over (IN)}+Kp√{square root over (IP)}  (4)        where Kn and Kp are functions of the sizes and mobilities of the corresponding MOS transistors. Therefore, the same Kn and Kp can obtained by appropriately selecting the respective sizes of the PMOS and NMOS transistors. Through this analysis, the transconductance of Vcm for the case of IP=IN=I is:Vcm<Vn+VGS,n: Gm=Kp√{square root over (IP)}=K√{square root over (IP)}=K√{square root over (I)}  (5.1)Vn+VGS,n<Vcm<Vp+VGS,p: Gm=Kn√{square root over (IN)}+Kp√{square root over (IP)}=2K√{square root over (I)}  (5.2)Vp+VGS,p<Vcm: Gm=Kn√{square root over (IN)}=K√{square root over (IN)}=K√{square root over (I)}  (5.3)        
FIG. 2 shows a graph of Gm as a function of Vcm according to Equation 5. As shown, the values of Gm vary by about 100% as Vcm varies in its allowed range. A unity gain frequency of the amplifier is proportional to the Gm of the input stage. Accordingly, variations of the transconductance Gm interfere with optimizing the frequency compensation. Hence, the frequency compensation can be optimized by monitoring and maintaining a steady input stage Gm, independent of variations of Vcm. In contrast, in some existing circuits Gm varies quite abruptly.